global-journal-of-research-in-engineering-f-electrical-electronic Global Journal of Research in Engineering - F: Electrical & Electronic 0975-5861 2249-4596 Global Journals Publishing Group Incorporated 89633 Design, Simulation & Performance Evaluation of OFDM System to Reduce PAPR Using SLM & LCM with FPGA TemrikarAqsa INDIA, Thakur College of Engineering 15 01 2013 13 F15 29 39

High peak-to-average power ratio (PAPR) of the transmitted signal is a major drawback of orthogonal frequency division multiplexing (OFDM). Selected mapping (SLM) technique is one of the promising PAPR reduction techniques for OFDM. In the SLM technique, statistically independent data blocks are generated from an OFDM data block using a set of phase sequences and one with the lowest PAPR is chosen and transmitted. In this paper, we propose an SLM technique which gives sizable reduction of nearly 2dB. The paper elaborates the hardware implementation of the generated block using FPGA. The test benches and the RTL schematic are generated.

 field programmable gate array matlab simulink orthogonal frequency division multiplexing selective level mapping peak-to-average power ratio and x Full Text

High peak-to-average power ratio (PAPR) of the transmitted signal is a major drawback of orthogonal frequency division multiplexing (OFDM). Selected mapping (SLM) technique is one of the promising PAPR reduction techniques for OFDM. In the SLM technique, statistically independent data blocks are generated from an OFDM data block using a set of phase sequences and one with the lowest PAPR is chosen and transmitted. In this paper, we propose an SLM technique which gives sizable reduction of nearly 2dB. The paper elaborates the hardware implementation of the generated block using FPGA. The test benches and the RTL schematic are generated.