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In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 ΞA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.
Vivek pant. . "Optimal high performance Self Cascode CMOS Current Mirror". Global Journal of Computer Science and Technology GJCST Volume 11 (GJCST Volume 11 Issue 15).
Crossref Journal DOI 10.17406/gjcst
Print ISSN 0975-4350
e-ISSN 0975-4172
v1.2
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Total Score: 142
Country: India
Subject: Global Journal of Computer Science and Technology
Authors: Vivek pant, Shweta Khurana (PhD/Dr. count: 0)
View Count (all-time): 281
Total Views (Real + Logic): 4067
Total Downloads (simulated): 205
Publish Date: 2011 08, Fri
Monthly Totals (Real + Logic):
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