Optimal high performance Self Cascode CMOS Current Mirror

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Optimal high performance Self Cascode CMOS Current Mirror

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Abstract

In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 ΞA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.

References

11 Cites in Article
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Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

Vivek pant. . "Optimal high performance Self Cascode CMOS Current Mirror". Global Journal of Computer Science and Technology GJCST Volume 11 (GJCST Volume 11 Issue 15).

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Journal Specifications

Crossref Journal DOI 10.17406/gjcst

Print ISSN 0975-4350

e-ISSN 0975-4172

Keywords
Classification
GJCST Classification I.2.9
Version of record

v1.2

Issue date
September 7, 2011

Language
English
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Optimal high performance Self Cascode CMOS Current Mirror

Vivek pant
Vivek pant Kurukshetra university