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A Qualitative Approach to Design Multi Channel UART Using FPGA and FIFO Technologies

§ Dept., of ECE, MITS, Madanapalle, Andhra Pradesh

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A Qualitative Approach to Design Multi Channel UART Using FPGA and FIFO Technologies

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Abstract

To meet modern complex control systems communication demands, my paper presents a multi channel UART controller based on FIFO (first in first out) and FPGA (field programmable gate array).The paper presents design method of asynchronous FIFO and structure of controller.This controller is designed with FIFO circuit block and UART (universal asynchronous teceiver transmitter) circuit block with in FPGA to implement communication in modern complex control systems quickly and effectively. This controller can be used to implement communication when master equipment and slaver equipment are set at different baud rate. It can also be used to reduce synchronization error between sub systems in asystem with several sub systems. The controller is reconfigurable and scalable. The whole scenario is simulated using VHDL coding.

References

8 Cites in Article
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  3. 3. William Stallings Data and Computer communications. Data and Computer communications
  4. 4. Stephen Brown,Zvonko Vranesic (2004). Fundamentals of Digital Logic with VHDL Design. Fundamentals of Digital Logic with VHDL Design
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Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

r ravindraiah, C.K.Hemantha Lakshmi, ckmahesh111. 2012. "A Qualitative Approach to Design Multi Channel UART Using FPGA and FIFO Technologies". Global Journal of Research in Engineering - F: Electrical & Electronic GJRE-F Volume 12 (GJRE Volume 12 Issue F7).

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Journal Specifications

Crossref Journal DOI 10.17406/gjre

Print ISSN 0975-5861

e-ISSN 2249-4596

Keywords
Classification
GJRE-F Classification FOR Code: 090601
Version of record
v1.2

Issue date
July 16, 2012

Language
English
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A Qualitative Approach to Design Multi Channel UART Using FPGA and FIFO Technologies

r ravindraiah
r ravindraiah Dept., of ECE, MITS, Madanapalle, Andhra Pradesh
C.K.Hemantha Lakshmi
C.K.Hemantha Lakshmi <p>Dept., of ECE, MITS, Madanapalle, Andhra Pradesh</p>
C.K.Hemantha Lakshmi
C.K.Hemantha Lakshmi <p>Dept., of ECE, MITS, Madanapalle, Andhra Pradesh</p>
<p>Dept., of ECE, MITS, Madanapalle, Andhra Pradesh</p>