An Efficient Implementation of Digit FIR Filters using Memory based Realization

1
Maloth Santhoshi
Maloth Santhoshi
2
Mrs. E P Vanetha
Mrs. E P Vanetha
3
P.Srikanth
P.Srikanth
1 Vardhaman College of Engineering

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The objective of our study was to evaluate, in a population of Togolese People Living With HIV(PLWHIV), the agreement between three scores derived from the general population namely the Framingham score, the Systematic Coronary Risk Evaluation (SCORE), the evaluation of the cardiovascular risk (CVR) according to the World Health Organization.
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The main contribution of this paper is an exact common sub expression elimination algorithm for the optimum sharing of partial terms in multiple constant multiplications (MCMs).Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtraction operations, they do not consider the low-level implementation issues that directly affect the area, delay, and power dissipation of the MCM design. It is found that the proposed LUT-based multiplier involves comparable area and time complexity for a word size of 8 bits, but for higher word sizes, it involves significantly less area and less multiplication time than the canonical-signed-digit (CSD)-based multipliers we have proposed the anti symmetric product coding (APC) and odd-multiple-storage (OMS) techniques for lookup-table (LUT) design for memory-based multipliers to be used in digital signal processing applications. It was observed that the proposed algorithm obtains better solutions in terms of area than the algorithms designed for the MCM problem and the optimization of area problem in a digit-serial MCM operation at gate-level.

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10 Cites in Articles

References

  1. A Novel Architecture of LUT Design Optimization for DSP Application.
  2. Chen Juan,X Lisheng,Zhang Fan,X Meng (2014). A Simplified Model for Hysteretic Nonlinear Dynamic Response Analysis of Concrete Covering Grouting.
  3. L Aksoy,C Lazzari Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool.
  4. Shen-Fu Hsiao,Jun-Hong Zhang Jian,Ming-Chih Chen,E Aksoy,P Costa,J Flores,Monteiro (2007). Low-Cost FIR Filter Designs Based on Faithfully Rounded Truncated Multiple Constant Multiplication Accumulation.
  5. Levent Aksoy,Cristiano Lazzari,Eduardo Costa,Paulo Flores,Jose Monteiro (2011). Optimization of area in digit-serial Multiple Constant Multiplications at gate-level.
  6. Levent Aksoy,Cristiano Lazzari,Eduardo Costa,Paulo Flores,José Monteiro (2011). Efficient shift-adds design of digit-serial multiple constant multiplications.
  7. Levent Aksoy,Eduardo Da Costa,Paulo Flores,Jos Monteiro (2008). Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications.
  8. Pramod Meher (2009). LUT Optimization for Memory-Based Computation.
  9. LUT Optimization Using Combined APC-OMS Technique For Memory-Based Computation.
  10. Optimization of Area in Digit-Serial Multiple Constant Multiplications at Gate-Level the Portuguese Foundation for Science and Technology (FCT) research project.

Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

Maloth Santhoshi. 2015. \u201cAn Efficient Implementation of Digit FIR Filters using Memory based Realization\u201d. Global Journal of Research in Engineering - F: Electrical & Electronic GJRE-F Volume 14 (GJRE Volume 14 Issue F9): .

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Crossref Journal DOI 10.17406/gjre

Print ISSN 0975-5861

e-ISSN 2249-4596

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v1.2

Issue date

January 9, 2015

Language

English

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The main contribution of this paper is an exact common sub expression elimination algorithm for the optimum sharing of partial terms in multiple constant multiplications (MCMs).Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtraction operations, they do not consider the low-level implementation issues that directly affect the area, delay, and power dissipation of the MCM design. It is found that the proposed LUT-based multiplier involves comparable area and time complexity for a word size of 8 bits, but for higher word sizes, it involves significantly less area and less multiplication time than the canonical-signed-digit (CSD)-based multipliers we have proposed the anti symmetric product coding (APC) and odd-multiple-storage (OMS) techniques for lookup-table (LUT) design for memory-based multipliers to be used in digital signal processing applications. It was observed that the proposed algorithm obtains better solutions in terms of area than the algorithms designed for the MCM problem and the optimization of area problem in a digit-serial MCM operation at gate-level.

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An Efficient Implementation of Digit FIR Filters using Memory based Realization

Maloth Santhoshi
Maloth Santhoshi Vardhaman College of Engineering
Mrs. E P Vanetha
Mrs. E P Vanetha
P.Srikanth
P.Srikanth

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