Area Efficient layout design of Multiply Complements Logic (MCL) Gate using QCA Technology
Quantum dot Cellular Automata (QCA) is one of now popular technology for its highly scalable feature and ultra low power consumption that made its one of the promising alternatives to CMOS technology. This paper present a new layout design of Multiply Complements Logic (MCL) gate based on QCA inverter (INV), QCA wire and QCA majority voter (MV) gates. To verify and simulate the proposed gate QCA Designer and Microwindlite tools are employed. The simulation result confirmed the correctness of the proposed circuits and comparison shows the area efficiency of QCA over CMOS technology. This proposed design layout has a promising future in constructing ultra low power exhausting information processing system and can stimulate higher digital applications in QCA.
