Area Optimized High Throughput IDMWT/DMWT Processor for OFDM on Virtex-5 FPGA

1
Dr. Anitha.K
Dr. Anitha.K
2
Dr.Dharmistan.K.Varugheese
Dr.Dharmistan.K.Varugheese
3
Dr N.J.R.Muniraj
Dr N.J.R.Muniraj
1 Arunai Engg College/Anna University

Send Message

To: Author

GJRE Volume 12 Issue F9

Article Fingerprint

ReserarchID

HNI1K

Area Optimized High Throughput IDMWT/DMWT Processor for OFDM on Virtex-5 FPGA Banner
  • English
  • Afrikaans
  • Albanian
  • Amharic
  • Arabic
  • Armenian
  • Azerbaijani
  • Basque
  • Belarusian
  • Bengali
  • Bosnian
  • Bulgarian
  • Catalan
  • Cebuano
  • Chichewa
  • Chinese (Simplified)
  • Chinese (Traditional)
  • Corsican
  • Croatian
  • Czech
  • Danish
  • Dutch
  • Esperanto
  • Estonian
  • Filipino
  • Finnish
  • French
  • Frisian
  • Galician
  • Georgian
  • German
  • Greek
  • Gujarati
  • Haitian Creole
  • Hausa
  • Hawaiian
  • Hebrew
  • Hindi
  • Hmong
  • Hungarian
  • Icelandic
  • Igbo
  • Indonesian
  • Irish
  • Italian
  • Japanese
  • Javanese
  • Kannada
  • Kazakh
  • Khmer
  • Korean
  • Kurdish (Kurmanji)
  • Kyrgyz
  • Lao
  • Latin
  • Latvian
  • Lithuanian
  • Luxembourgish
  • Macedonian
  • Malagasy
  • Malay
  • Malayalam
  • Maltese
  • Maori
  • Marathi
  • Mongolian
  • Myanmar (Burmese)
  • Nepali
  • Norwegian
  • Pashto
  • Persian
  • Polish
  • Portuguese
  • Punjabi
  • Romanian
  • Russian
  • Samoan
  • Scots Gaelic
  • Serbian
  • Sesotho
  • Shona
  • Sindhi
  • Sinhala
  • Slovak
  • Slovenian
  • Somali
  • Spanish
  • Sundanese
  • Swahili
  • Swedish
  • Tajik
  • Tamil
  • Telugu
  • Thai
  • Turkish
  • Ukrainian
  • Urdu
  • Uzbek
  • Vietnamese
  • Welsh
  • Xhosa
  • Yiddish
  • Yoruba
  • Zulu

OFDM is one of the most popular modulation techniques that is been widely used in most of the wireless and wired communication links. The OFDM architecture consists of QAM modulator and orthogonal frequency modulator. In this work we propose DMWT based orthogonal frequency modulator for achieving higher BER. The IDMWT architecture is designed considering N=4, thus the preprocessing unit converts the QAM samples of N to 2N and is modulated using DMWT filters. The filtered output is further transmitted and is received at the receiver. During the post processing, N samples are extracted by use of DMWT demodulation technique. The complex architecture of IDMWT and DMWT are reduced for its complexity and speed by the modified architecture. The DMWT architecture is modified for FPGA implementation improving the area, power and speed performances. The modified DMWT architecture is implemented on VirtexII pro FPGA which operates at 300MHz frequency and occupies area of less than 1%, with power consumption less than 28mW. The proposed design is suitable for real time and low power applications.

7 Cites in Articles

References

  1. H Zhang (2004). Research of DFT-OFDM and DWT-OFDM on Different Transmission Scenarios.
  2. B Negash (2000). Wavelet Based Multicarrier Transmission over Wireless Multipath Channels.
  3. M Cotronei Multiwavelet Analysis and Signal Processing.
  4. V Strela,P Heller,G Strang,P Topiwala,C Heil (1993). The application of multiwavelet filterbanks to image processing.
  5. Strela (1996). Multiwavelets: Theory and Application.
  6. E Biglieri,J Proakis,S Shamai (1998). Fading Channels: Information-Theoretic and Communications Aspects.
  7. U Ragupathy,A Kumar (2012). Investigation on mammographic image compression and analysis using multiwavelets and neural network.

Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

Dr. Anitha.K. 2012. \u201cArea Optimized High Throughput IDMWT/DMWT Processor for OFDM on Virtex-5 FPGA\u201d. Global Journal of Research in Engineering - F: Electrical & Electronic GJRE-F Volume 12 (GJRE Volume 12 Issue F9): .

Download Citation

Journal Specifications

Crossref Journal DOI 10.17406/gjre

Print ISSN 0975-5861

e-ISSN 2249-4596

Keywords
Classification
Not Found
Version of record

v1.2

Issue date

September 3, 2012

Language

English

Experiance in AR

The methods for personal identification and authentication are no exception.

Read in 3D

The methods for personal identification and authentication are no exception.

Article Matrices
Total Views: 5288
Total Downloads: 2638
2026 Trends
Research Identity (RIN)
Related Research

Published Article

OFDM is one of the most popular modulation techniques that is been widely used in most of the wireless and wired communication links. The OFDM architecture consists of QAM modulator and orthogonal frequency modulator. In this work we propose DMWT based orthogonal frequency modulator for achieving higher BER. The IDMWT architecture is designed considering N=4, thus the preprocessing unit converts the QAM samples of N to 2N and is modulated using DMWT filters. The filtered output is further transmitted and is received at the receiver. During the post processing, N samples are extracted by use of DMWT demodulation technique. The complex architecture of IDMWT and DMWT are reduced for its complexity and speed by the modified architecture. The DMWT architecture is modified for FPGA implementation improving the area, power and speed performances. The modified DMWT architecture is implemented on VirtexII pro FPGA which operates at 300MHz frequency and occupies area of less than 1%, with power consumption less than 28mW. The proposed design is suitable for real time and low power applications.

Our website is actively being updated, and changes may occur frequently. Please clear your browser cache if needed. For feedback or error reporting, please email [email protected]
×

This Page is Under Development

We are currently updating this article page for a better experience.

Request Access

Please fill out the form below to request access to this research paper. Your request will be reviewed by the editorial or author team.
X

Quote and Order Details

Contact Person

Invoice Address

Notes or Comments

This is the heading

Lorem ipsum dolor sit amet, consectetur adipiscing elit. Ut elit tellus, luctus nec ullamcorper mattis, pulvinar dapibus leo.

High-quality academic research articles on global topics and journals.

Area Optimized High Throughput IDMWT/DMWT Processor for OFDM on Virtex-5 FPGA

Dr. Anitha.K
Dr. Anitha.K
Dr.Dharmistan.K.Varugheese
Dr.Dharmistan.K.Varugheese
Dr N.J.R.Muniraj
Dr N.J.R.Muniraj

Research Journals