Design of a Five Stage Pipeline CPU with Interruption System

Abdulraqeb Alnabihi

Design of a Five Stage Pipeline CPU with Interruption System

Abdulraqeb Alnabihi * §

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§ Guangdong University of Technology

Design of a Five Stage Pipeline CPU with Interruption System

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Abstract

A central processing unit (CPU), also referred to as a central processor unit, is the hardware within a computer that carries out the instructions of a computer program by performing the basic arithmetical, logical, and input/output operations of the system. The term has been in use in the computer industry at least since the early 1960s.The form, design, and implementation of CPUs have changed over the course of their history, but their fundamental operation remains much the same. A computer can have more than one CPU; this is called multiprocessing. All modern CPUs are microprocessors, meaning contained on a single chip. Some integrated circuits (ICs) can contain multiple CPUs on a single chip; those ICs are called multi-core processors. An IC containing a CPU can also contain peripheral devices, and other components of a computer system; this is called a system on a chip (SoC).Two typical components of a CPU are the arithmetic logic unit (ALU), which performs arithmetic and logical operations, and the control unit (CU), which extracts instructions from memory and decodes and executes them, calling on the ALU when necessary. Not all computational systems rely on a central processing unit. An array processor or vector processor has multiple parallel computing elements, with no one unit considered the “center”. In the distributed computing model, problems are solved by a distributed interconnected set of processors.

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Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

Abdulraqeb Alnabihi. 2015. "Design of a Five Stage Pipeline CPU with Interruption System". Global Journal of Computer Science and Technology - A: Hardware & Computation GJCST-A Volume 15 (GJCST Volume 15 Issue A2).

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GJCST Volume 15 Issue A2

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Journal Specifications

Crossref Journal DOI 10.17406/gjcst

Print ISSN 0975-4350

e-ISSN 0975-4172

Keywords

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Classification

GJCST-A Classification B.2.1

B.5.1

Submission ReceivedDecember 16, 2014
Peer Review Double Blind
Handling Editor
Accepted January 1, 2015
Published January 15, 2015

Version of record

v1.2

Issue date

November 9, 2015

Language

English

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Article Matrices

Total Score: 172

Country: China

Subject: Global Journal of Computer Science and Technology

Authors: Abdulraqeb Abdullah Saeed Abdo, Liu Yijun (PhD/Dr. count: 0)

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