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ReserarchID
R0A45
Crossref Journal DOI 10.17406/gjre
Print ISSN 0975-5861
e-ISSN 2249-4596
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The main objective of this paper is to design a generalized architecture for polyphase code identification used in RADAR signal processing applications. The proposed VLSI architecture will identify the type of a given polyphase code, amount of phase change and number of phase changes. RADAR signal processing applications require a set of sequences with individually peaky autocorrelation and pair wise cross correlation. Obtaining such sequences is a combinatorial problem. This paper aims at implementation of an efficient VLSI system for the design of polyphase codes identification useful for RADAR applications. The VLSI system is implemented on the field programmable gate array as it provides the flexibility of reconfigurability and reprogrammability and it is a real time signal processing solution which identifies the polyphase codes. The simulation results and the FPGA implementation shows the successful code identification, amount of phase, number of phase changes for a given input sequence.
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