Performance Analysis of Secure Integrated Circuits using Blowfish Algorithm

V. Kumara Swamy; Dr. Prabhu Benakop

Performance Analysis of Secure Integrated Circuits using Blowfish Algorithm

V. Kumara Swamy * §

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Dr. Prabhu Benakop §

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§ Auroras Engineering College

Performance Analysis of Secure Integrated Circuits using Blowfish Algorithm

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References

11 Cites in Article

Reference Format

1. Monika Agrawal,Pradeep Mishra (2012). A Modified Approach for Symmetric Key Cryptography Based on Blowfish Algorithm. International Journal of Engineering and Advanced Technology (IJEAT, 1(6)
2. S Pavithra,Mrs Ramadevi (2012). Study and Performance Analysis of Cryptography Algorithms. International Journal of Advanced Research in Computer Engineering & Technology, 1(5)
3. W Walied,Ali Souror,Rasheed Taki El-Deen,Adel Mokhtar -Awady Ahmed,Zaghlulmahmoud (2012). An Implementation of High Security and High Throughput Triple Blowfish Cryptography Algorithm. International Journal of Research and Reviews in Signal Acquisition and Processing (IJRRSAP), 2(1)
4. T Haridimos,Giorgos Vergos,Dimitrakopoulos (2012). On Modulo 2n +1 Adder Design. IEEE TRANSACTIONS ON COMPUTERS, 61(2)
5. Chen Liu,Omar Granados,Rolando Duarte,Jean Andrian (2012). Energy Efficient Architecture Using Hardware Acceleration for Software Defined Radio Components. Journal of Information Processing Systems, 8(1), 133-144.
6. Gurjeevan Singh,Ashwani Kumar Singla,K Sandha (2011). Through Put Analysis of Various Encryption Algorithms. IJCST, 2(3)
7. V Swamy,B Prabhu G Benakop,Sandeep (2010). Implementation of digital design flow for DPA secure WDDL crypto processor using blowfish algorithm. The Libyan Arab International Conference on Electrical and Electronic Engineering (LAICEEE-2010), 565-573.
8. V Swamy,Dr Prabhu,G Benakop,P Sandeep (2009). Design and Implementation of DPA Resistant Crypto-Processor using Blowfish Algorithm. International Conference on Advanced Communication and Informatics (ICACI-2009), 25-32.
9. Somayeh Timarchi,Omid Kavehei,Keivan Navi (2008). Low Power Modulo 2n+1 Adder Based on Carry Save Diminished-One Number System. American Journal of Applied Sciences, 5(4), 312-319.
10. Kris Tiri,Ieee Member,Ingrid Verbauwhede,Senior Member (2006). A Digital Design Flow for Secure Integrated Circuits. IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, 25(7)
11. K Tiri,I Verbauwhede (2004). A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation. Proc. Design, Automation and Test Eur. Conf, 246-251.

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Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

V. Kumara Swamy, Dr. Prabhu Benakop. 2014. "Performance Analysis of Secure Integrated Circuits using Blowfish Algorithm". Global Journal of Computer Science and Technology - E: Network, Web & Security GJCST-E Volume 13 (GJCST Volume 13 Issue E17).

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GJCST Volume 13 Issue E17

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Journal Specifications

Crossref Journal DOI 10.17406/gjcst

Print ISSN 0975-4350

e-ISSN 0975-4172

Keywords

bf dpa and hdl Dt et ICT SIC WDDL

Classification

GJCST-E Classification C.4

Submission ReceivedDecember 12, 2012
Peer Review Double Blind
Handling Editor
Accepted January 2, 2013
Published January 15, 2013

Version of record

v1.2

Issue date

February 7, 2014

Language

English

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Article Matrices

Total Score: 107

Country: India

Subject: Global Journal of Computer Science and Technology - E: Network, Web & Security

Authors: V. Kumara Swamy, Dr. Prabhu Benakop (PhD/Dr. count: 1)

View Count (all-time): 491

Total Views (Real + Logic): 2328

Total Downloads (simulated): 167

Publish Date: 2013 01, Tue

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Total Views: 2.3K

Total Downloads: 167

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