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ReserarchID
1V463
Crossref Journal DOI 10.17406/gjre
Print ISSN 0975-5861
e-ISSN 2249-4596
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This paper presents a synthesis of robustness evaluation on power RF LDMOS devices and its relation with electrical and physical behaviours after RF life-tests. It is important to understand the physical degradation mechanism effects and the liaison on drifts of critical electrical parameters after life ageing tests, in I-V such as threshold voltage (Vth), the feedback capacitance (Crss) in C-V and the S-parameter (S21) in RF. It shows with tracking of set parameters that Hot Carrier Injection (HCI) phenomenon appears. It is the main cause for device degradation leading to the interface state generation (traps), which results in a build up of negative charge at Si/SiO2 interface. More interface states are created due to a located maximum impact ionization rate at the gate edge. Such simulations correctly take into account interactions coupled between electrical, thermal and RF behaviours in device inside using the FEM method. A numerical model (Silvaco-Atlas) was used to confirm degradation phenomena. The problem of hot-electron should be taken into consideration in the design of the power RF MOS devices and can be a useful tool to investigate reliability in MOSFET.
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