Study of the Power Consumption of a Digital- Front-End using Random Sampling

M. Diop

Study of the Power Consumption of a Digital- Front-End using Random Sampling

M. Diop * §

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Universit Cheikh Anta DIOP de Dakar, SENEGAL

Study of the Power Consumption of a Digital- Front-End using Random Sampling

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Abstract

Recently, irregular sampling techniques have been proposed for the design of digital front-end of a radio receiver. This front-end consist in the interface between the analog front-end and the baseband processing. The advantage of these techniques is the simplification of the sampling frequency conversion and the channel selection. The objective of the proposed work is to study if a gain in power consumption is also obtained. In this paper, the major research is the digital-front-end power consumption by using random sampling. Firstly, we introduce the methods of random sampling JRS (Jitter random sampling) and ARS (Additive random sampling). Then we use these methods to generate the random clock, select the hardware as mixed platform with ADC and FPGA and implement different solutions. At last, we measure the power consumption of different solutions and make a comparison.

References

7 Cites in Article

Reference Format

J Wojtiuk (2000). Randomized Sampling for Radio Design.
Jeffrey Wojtiuk,Richard Martin (2001). Random Sampling Enables Flexible Design for Multiband Carrier Signals.
R Martin,D Castelow (1997). Reconstruction of multiband signals using irregular sampling.
Ben-Romdhane Manel,Rebai Chiheb,Ghazel Adel (2008). Pseudorandom Clock Signal Generation for Data Conversion in a Multistandard Receiver.
Chiheb Rebai,Manel Ben-Romdhane,Patricia Desgreys,Patrick Loumeau,Adel Ghazel (2009). Pseudorandom signal sampler for relaxed design of multistandard radio receiver.
N Michael,S Shah,J Das,M Sandeep,C Vijaykumar (2007). Nonuniform digitizer foralias-free sampling of wide band analog signals.
Fares Haïfa,Ben-Romdhane Manel,Rebai Chiheb (2008). Non Uniform Sampled Signal Reconstruction for Software Defined Radio Applications.

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Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

M. Diop. 2014. "Study of the Power Consumption of a Digital- Front-End using Random Sampling". Global Journal of Research in Engineering, Global Journal of Research in Engineering - F: Electrical & Electronic GJRE-F Volume 14 (GJRE Volume 14 Issue F3).

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GJRE Volume 14 Issue F3

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Journal Specifications

Crossref Journal DOI 10.17406/gjre

Print ISSN 0975-5861

e-ISSN 2249-4596

Keywords

ADC ARS FPGA JRS power consumption

Classification

GJRE-F Classification FOR Code: 090699

Submission ReceivedDecember 16, 2013
Peer Review Double Blind
Handling Editor
Accepted January 3, 2014
Published January 15, 2014

Version of record

v1.2

Issue date

June 2, 2014

Language

English

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Article Matrices

Total Score: 103

Country: Senegal

Subject: Global Journal of Research in Engineering

Authors: M. Diop, Deng Xiaoyu, J.-F. Diouris (PhD/Dr. count: 0)

View Count (all-time): 317

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Publish Date: 2014 01, Wed

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Total Views: 1.2K

Total Downloads: 87

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