Research
Modeling of Dc Link Capacitor Voltage Balance in 3-Level Inverter Using Space Vector Modulation Technique
A new simplified space vector PWM method for a three-level inverter is proposed in this paper. The three level inverter has a large number of switching states compared to a two-level inverter. In the proposed scheme, three-level space vector PWM inverter is easily implemented than as conventional two-level space vector PWM inverter. This paper presents a novel DC link balancing scheme for a back-to-back system with three-level diode clamped topologies. The proposed algorithm is improvement of the variable switching frequency control strategy formerly introduced with the three-level back-to-back system and it relays on measurement of adjacent capacitor voltages which provide information about the potential variation in consecutive nodes of the three-level DC link network, Therefore, the proposed method can also be applied to multilevel inverters. In this work, a three-level inverter using space vector modulation strategy has been modeled and simulated.
PWM Strategies for Multilevel Inverter and Dc Link Capacitor Voltage Balancing For an Induction Motor Drive
Multilevel PWM techniques are extensions of twolevel PWM methods; the multiple levels in these inverters offer extra degrees of freedom and greater possibilities in terms of device utilization and effective switching frequency. Though the SPWM and its variations are popular PWM techniques in multilevel inverters, implementing them in a digital platform is tedious, as the pulse-widths can only be defined by transcendental equations. A dc link capacitor voltage balancing scheme is proposed for an induction motor drive. The motor is fed from with threelevel inverters generating a five level output voltage structure. The proposed inverter vector locations exhibit multiplicity in the inverter switching combinations which is suitably exploited to arrive at a capacitor voltage balancing scheme. This allows the use of a single dc link power supply for the combined inverter structure. The lower order harmonic components in the output voltage waveform are eliminated by raising the carrier frequency.
