Optimal high performance Self Cascode CMOS Current Mirror

Article ID

6RCMT

,

Optimal high performance Self Cascode CMOS Current Mirror

Vivek pant Kurukshetra university

Shweta Khurana

DOI

Abstract

In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 μA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.

Optimal high performance Self Cascode CMOS Current Mirror

In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 μA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.

Authors

Vivek pant Kurukshetra university

Shweta Khurana

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References

How to Cite

Vivek pant. 1970. “. Unknown Journal GJCST Volume 11 (GJCST Volume 11 Issue 15): .

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Journal Specifications

GJCST Volume 11 Issue 15
Pg. 61- 63

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Classification

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Submission Received July 10, 2011
Accepted August 8, 2011
Published August 19, 2011

Keywords

cascode current mirror current mirrors low voltage analog circuit

Article Matrices

Total Score: 102

Country: India

Subject: Uncategorized

Authors: Vivek pant, Shweta Khurana (PhD/Dr. count: 0)

View Count (all-time): 33

Total Views (Real + Logic): 20598

Total Downloads (simulated): 10965

Publish Date: 1970 01, Thu

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Total Views: 20598

Total Downloads: 10965

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