Design of 8-Bit Arithmetic Processor Unit based on Reversible Logic

A.Kamaraj

Design of 8-Bit Arithmetic Processor Unit based on Reversible Logic

A.Kamaraj * §

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§ Mepco Schlenk Engineering College

Design of 8-Bit Arithmetic Processor Unit based on Reversible Logic

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Abstract

Reversible logic is emerging as an important research area in the recent years due to its ability to reduce the power dissipation, which is the main requirement in low power digital design. Energy dissipation is proportional to the number of bits lost during computation. The reversible circuits do not lose information and can generate unique outputs from specified inputs and vice versa. It has application in diverse fields such as low power CMOS design, optical information processing, cryptography, quantum computation and nanotechnology. This paper proposes a reversible design of an 8 -bit arithmetic processor. The architecture of the processor has been proposed, in which, each block is realized using reversible logic gates. The important blocks of the processor are control unit, arithmetic and logical unit and register file. Each module has been coded using Verilog then simulated using Modelsim and prototyped in Xilinx-Spartan 3E.

References

5 Cites in Article

Reference Format

C Bennett (1973). Logical Reversibility of Computation.
Ravish Aradhya,H,Praveen Kumar,K N ; Muralidhara,H Rangaraju,U Venugopal,K Muralidhara,K Raja (2010). Design of Control unit for Low Power ALU Using Reversible Logic.
; Ravish Design,H Aradhya,R Chinmaye,K Muralidhara (2012). Optimization and Synthesis of Efficient Reversible Logic Binary Decoder.
Deepika Vergiya,Anand Chaturvedi (2012). Usage Insights and Adoption Factors of UPI Value-Added Services in Kota Rajasthan India.
(2008). Design of a Novel Reversible Multiplier Circuit Using HNG Gate in Nanotechnology, Majid Haghparast, Somayyeh Jafarali Jassbi.

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Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

A.Kamaraj. 2013. "Design of 8-Bit Arithmetic Processor Unit based on Reversible Logic". Global Journal of Research in Engineering, Global Journal of Research in Engineering - F: Electrical & Electronic GJRE-F Volume 13 (GJRE Volume 13 Issue F10).

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GJRE Volume 13 Issue F10

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Journal Specifications

Crossref Journal DOI 10.17406/gjre

Print ISSN 0975-5861

e-ISSN 2249-4596

Keywords

FPGA reversible gate reversible logic xilinx

Classification

GJRE-F Classification FOR Code: 290901

Submission ReceivedDecember 8, 2012
Peer Review Double Blind
Handling Editor
Accepted December 31, 2012
Published January 15, 2013

Version of record

v1.2

Issue date

August 10, 2013

Language

English

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Article Matrices

Total Score: 103

Country: India

Subject: Global Journal of Research in Engineering

Authors: A.Kamaraj, C.Kalyana Sundaram, J.Senthil Kumar (PhD/Dr. count: 0)

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Publish Date: 2013 01, Tue

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Total Views: 1.3K

Total Downloads: 113

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