Optimal high performance Self Cascode CMOS Current Mirror

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Vivek pant
Vivek pant
σ
Shweta Khurana
Shweta Khurana
α Kurukshetra University

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Optimal high performance Self Cascode CMOS Current Mirror

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Abstract

In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 μA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.

References

11 Cites in Article
  1. Behzad Razavi (2002). CMOS technology characterization for analog and RF design.
  2. Yan Shouli,Sanchez-Sinencio Edgar (2000). Low voltage Analog Circuit Design Techniques.
  3. G Giustolisi,G Palumbo,M Criscione,F Cutri (2003). A low-voltage low-power voltage reference based on subthreshold MOSFETs.
  4. S Rajput,S Jamuar (2002). Low voltage analog circuit design techniques.
  5. Alfonso Rincon,M Gabriel (1995). Low Voltage Design Techniques and Considerations for Integrated Operational Amplifier Circuit.
  6. T Itakura,Z Czarnul (1997). High output resistance CMOS current mirrors for low voltage applications.
  7. J Mulder,A Van Der Woerd,W Serdijn,A Van Roermund (1996). High-swing cascode MOS current mirror.
  8. E Sackinger,W Guggenbuhl (1990). A high-swing, high-impedance MOS cascode circuit.
  9. S Rajput (2002). Low voltage current mode circuit structures and their applications.
  10. S Rajput,S Jamuar (2003). A Current Mirror for Low Voltage, High Performance Analog Circuits.
  11. X Xie,M Schneider,E Sánchez-Sinencio,S Embabi (1999). Sound design of low power nested transconductance-capacitancecompensation amplifiers.

Funding

No external funding was declared for this work.

Conflict of Interest

The authors declare no conflict of interest.

Ethical Approval

No ethics committee approval was required for this article type.

Data Availability

Not applicable for this article.

How to Cite This Article

Vivek pant. 1970. \u201cOptimal high performance Self Cascode CMOS Current Mirror\u201d. Unknown Journal GJCST Volume 11 (GJCST Volume 11 Issue 15): .

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Issue Cover
GJCST Volume 11 Issue 15
Pg. 61- 63
Journal Specifications
Version of record

v1.2

Issue date

September 7, 2011

Language
en
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In this paper the current mirror presented, having low voltage and mixed mode structure has been proposed. The performance of self cascade MOSFET current mirror is optimized with high output impedance and can operate at 1 V or below. Simulation results conform to Analog Mentor tools having Design Architect for schematics and Eldonet for SPICE simulation, with input reference current of 20 μA. This review paper presents a comparative performance study of self cascode current mirror with other current mirrors.

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Optimal high performance Self Cascode CMOS Current Mirror

Vivek pant
Vivek pant Kurukshetra University
Shweta Khurana
Shweta Khurana

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