Neural Networks and Rules-based Systems used to Find Rational and Scientific Correlations between being Here and Now with Afterlife Conditions
Neural Networks and Rules-based Systems used to Find Rational and
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This article discusses the architecture design of DMA controller on high performance GPS receiver based on RTEMS. We achieve the optimal integration of DMA IP and navigation baseband system. We designed the hardware architecture of DMA IP and make full use of hardware performance with the idea of multiplexing. We use register and FIFO buffer to achieve read-write control. And we design the DMA controller with Verilog HDL. Finally we verify the design on Altera Cyclone4 FPGA. The result demonstrates that DMA controller can ease the CPU’s burden and shorten the acquisition & tracking time thus improving the performance of the whole system.
Abdulraqeb Alnabihi. 2015. \u201cThe Implementation of DMA Controller on Navigation Baseband SoC\u201d. Global Journal of Computer Science and Technology - A: Hardware & Computation GJCST-A Volume 15 (GJCST Volume 15 Issue A2): .
Crossref Journal DOI 10.17406/gjcst
Print ISSN 0975-4350
e-ISSN 0975-4172
The methods for personal identification and authentication are no exception.
The methods for personal identification and authentication are no exception.
Total Score: 132
Country: China
Subject: Global Journal of Computer Science and Technology - A: Hardware & Computation
Authors: Abdulraqeb Alnabihi, Prof. Liu Yijun (PhD/Dr. count: 0)
View Count (all-time): 291
Total Views (Real + Logic): 8190
Total Downloads (simulated): 2062
Publish Date: 2015 11, Mon
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Neural Networks and Rules-based Systems used to Find Rational and
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This article discusses the architecture design of DMA controller on high performance GPS receiver based on RTEMS. We achieve the optimal integration of DMA IP and navigation baseband system. We designed the hardware architecture of DMA IP and make full use of hardware performance with the idea of multiplexing. We use register and FIFO buffer to achieve read-write control. And we design the DMA controller with Verilog HDL. Finally we verify the design on Altera Cyclone4 FPGA. The result demonstrates that DMA controller can ease the CPU’s burden and shorten the acquisition & tracking time thus improving the performance of the whole system.
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