Research
A High-Precision Low-Cost Analog Acceleration and Vibration Amplifier using PVDF Piezoelectric Sensors
This paper describes a high-resolution analog acceleration and vibration amplifier for use with piezoelectric polyvinylidene fluoride (PVDF) sensors. The purpose of this system is to monitor automated parts placement on integrated circuit boards. One of the problems facing production and inspection equipment is the occurrence of resonant and ambient vibrations. Even small errors can cause systems with micrometer and nanometer precision to exceed design tolerances. This work describes a method to monitor mechanical vibrations through a portable and inexpensive signal-processing unit. The system provides user-selectable gain and filtering modules that are compact and reliable. PVDF is currently used in sensing applications, and its material properties have proven very useful for sensing mechanical stress, strain, pressure, and temperature
Using Neural Networks to Design Transistor Amplifier Circuits
This paper is an extension of previous work that addressed the application of bipolar transistor amplifier design using neural networks. That work addressed the design of common emitter amplifiers by first mathematically determining specific output parameters from a large selection of biasing resistors. Once the outputs had been determined, a neural network was trained, using the aforementioned results as inputs and the biasing resistors as outputs. This was initially performed with ideal emitter bypass capacitors, but was then followed-up by employing several non-ideal capacitors, making it much more interesting and useful. This paper focuses on the common collector and the common base configurations. Bipolar junction transistor amplifier parameters often include voltage gain, input impedance, output impedance, and the voltage difference between the collector and emitter. These will be addressed in this paper as before. There are several methods that can provide a suitable solution for each design, however the objective of this work is to indicate which external resistors are necessary to yield useful results by employing neural networks.
Reducing Hearing Aid Power Consumption Using Truncated-Matrix Multipliers
The traditional platforms for implementing hearing aid algorithms have been application specific integrated circuits (ASIC) and some general purpose DSP chips. One of the most important issues involved in hearing aid design is power consumption, i.e., battery life. This paper introduces an alternative method for implementing hearing aid algorithms by using truncated-matrix multipliers. These designs can offer a significant reduction in power consumption and chip area. However, the approach can often increase computational error but it can be partially compensated for by introducing a method of coefficient shifting of the filter weights. This latter approach significantly reduces the computational error resulting in improved system performance.
