The key requirements of the channel filter in a software defined radio receiver are low power, low complexity and reconfigurability of the architecture used. An architecture based on frequency response masking (FRM) technique is recently reported which offers, reconfigurability at the filter and architecture levels, in addition to the inherent low complexity offered by the FRM technique. In this paper, we propose a modified architecture to reduce the overall complexity by realizing the prototype filter in the FRM technique by another FRM filter. The hardware implementation of the filter calls for the representation of the filter coefficients in the signed power of two (SPT) space. It is well known that if canonic signed digit (CSD) representation is employed in the SPT space, the hardware complexity can further be significantly reduced. Hence it is proposed in this paper to extend the CSD representation to the FRM based digital filters. The design of the FRM filter in the discrete space degrades the performance and this calls for the use of efficient non-linear optimization techniques. We use genetic algorithm (GA) based optimization which brings forth a near optimal solution. This results in very low power and low complexity FRM based multiplier-less reconfigurable non-uniform channel filters.